This invention relates to integrated semiconductor devices and systems, and more particularly to features of a level detector circuit for use as an over-voltage detector to initiate a test mode in a high-speed, miniaturized, electronic digital signal processing system in single-chip microcomputer form.
It is the principal object to this invention to provide improved features of a level detector circuit for initiating a test mode of operation in a semiconductor device such as, for example, a microcomputer device and system, particularly one adapted for real-time digital signal processing or the like. Another object is to provide a level detector for use in a high-speed microcomputer of enhanced capabilities.